QUÉ SIGNIFICA PLANAR PROCESS EN INGLÉS
Proceso planar
El proceso planar es un proceso de fabricación usado en la industria de semiconductores para construir componentes individuales de un transistor, ya su vez, conectar esos transistores entre sí. Es el proceso primario por el cual se construyen los circuitos integrados modernos. El proceso fue desarrollado por Jean Hoerni, uno de los "ocho traidores", mientras trabajaba en Fairchild Semiconductor. El concepto clave era ver un circuito en su proyección bidimensional, permitiendo así el uso de conceptos de procesamiento fotográfico tales como negativos de película para enmascarar la proyección de productos químicos expuestos a la luz. Esto permitió el uso de una serie de exposiciones sobre un sustrato para crear óxido de silicio o regiones dopadas. Junto con el uso de la metalización y el concepto de aislamiento de la unión p-n, los investigadores de Fairchild fueron capaces de crear circuitos en una sola rebanada de cristal de silicio a partir de una bola de silicio monocristalino. El proceso implica los procedimientos básicos de la oxidación de dióxido de silicio, el grabado de SiO2 y la difusión de calor.
definición de planar process en el diccionario inglés
La definición de proceso planar en el diccionario es un método para producir uniones difusas en dispositivos semiconductores. Se graba un patrón de orificios en una capa de óxido formada sobre un sustrato de silicio, en el que las impurezas se difunden a través de los orificios.
PALABRAS DEL INGLÉS RELACIONADAS CON «PLANAR PROCESS»
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10 LIBROS DEL INGLÉS RELACIONADOS CON «PLANAR PROCESS»
Descubre el uso de
planar process en la siguiente selección bibliográfica. Libros relacionados con
planar process y pequeños extractos de los mismos para contextualizar su uso en la literatura.
1
The Geek Atlas: 128 Places Where Science and Technology Come ...
And it was at Fairchild that the planar process for silicon chip manufacturing was
invented. Around the same time, in 1958/1959, Jack Kilby (atTexas Instruments)
and Robert Noyce (at Fairchild) invented the integrated circuit,where multiple ...
John Graham-Cumming,
2009
2
ELECTRONIC DEVICES AND APPLICATIONS
The planar process is comparatively inexpensive and produces good-quality
devices at cheaper prices. 4. Devices produced through planar process have
closely matching properties. 5. Doping levels can be precisely controlled. 6. All
types of ...
3
To the Digital Age: Research Labs, Start-up Companies, and ...
The Broader Community and the Benevolent Despotism of the Planar Process
The explosive growth in MOS papers after 1962 can be attributed to the
development of the planar process, the rise of the integrated circuit, and the
accompanying ...
4
Op Amp Applications Handbook
However, the important distinction in terms of device protection is that within the
planar process the otherwise exposed regions are left covered with silicon
dioxide. This feature reduced the device sensitivity to contaminants; making a
much ...
5
Data Conversion Handbook
However, the important distinction in terms of device protection is that within the
planar process the otherwise exposed regions are left covered with silicon
dioxide. This feature reduced the device sensitivity to contaminants; making a
much ...
Analog Devices Inc., Engineeri,
2004
6
Makers of the Microchip: A Documentary History of Fairchild ...
The announcements attracted considerable attention in the electronics industry,
and the planar process was soon viewed as a major innovation that would
reorient the technological direction for the semiconductor industry. In order to
take part ...
Lécuyer, Christophe, Brock, David C.
7
The Semiconductor Business: The Economics of Rapid Growth ...
The integrated circuit period covers the years between the introduction of the
planar process and the integrated circuit (1959-61) and the introduction of the
microprocessor (1971). The chapter is organized in the following way: a
discussion of ...
8
Data Conversion Handbook
However, the important distinction in terms of device protection is that within the
planar process the otherwise exposed regions are left covered with silicon
dioxide. This feature reduced the device sensitivity to contaminants; making a
much ...
Walter Allan Kester,
2005
9
The Integrated Circuit Hobbyist's Handbook
Most ICs are still manufactured using the planar process which Noyce developed
in 1959. In the planar process, the various integrated compo- nents extend below
the surface of the substrate. Figure 1-1 CHAPTER ONE: Experimenting with ...
10
ULSI
Process Integration III: Proceedings of the ...
This attribute of silicon facilitated its utilization in the planar process as a diffusion
mask for p-n junction fabrication as developed by Frosch and Derrick [9,10], the
fabrication of the planar silicon transistor by Hoerni [12-15], passivation of the ...
Cor L. Claeys, Electrochemical Society. Electronics Division,
2003
10 NOTICIAS EN LAS QUE SE INCLUYE EL TÉRMINO «PLANAR PROCESS»
Conoce de qué se habla en los medios de comunicación nacionales e internacionales y cómo se emplea el término
planar process en el contexto de las siguientes noticias.
Moore's Law in Transition
... can produce chips that deliver better performance and lower power than the commonly-used 28nm planar process at a comparable cost (and ... «PC Magazine, Jul 15»
This is what the Huawei Mate 8 might look like
To deal with today's most powerful mobile chips' power consumption you need manufacture it with expensive 20nm planar process or even ... «Phone Arena, Jul 15»
1k Qubit IC Has 128k Josephson Junctions
D-Wave Systems has put 1000 qubits, comprising 128,000 Josephson Junctions, on a chip using a 6-metal layer planar process with 0.25μm ... «ElectronicsWeekly.com, Jun 15»
Dwave commercializes 1152 qubit chip but there are 2048 physical …
... over 128,000 Josephson junctions (tunnel junctions with superconducting electrodes) in a 6-metal layer planar process with 0.25μm features, ... «Next Big Future, Jun 15»
UMC skips 20nm planar process tech, leaps ahead to 16nm FinFET
United Microelectronics Corp., the world's second largest contract maker of semiconductors, said that it would not offer 20nm planar fabrication ... «KitGuru, Abr 15»
How Sony's Just-Announced Xperia Z4 Compares To The Xperia Z3
... the Snapdragon 810 continues to be built on TSMC's 20nm planar process technology. This gives Samsung's chip an advantage in thermal ... «Tom's Hardware, Abr 15»
When Will AMD's Technology Process Catch Up To Intel's?
... customers as of earlier this month, and TSMC debuted its 20nm planar process back in September with Apple's (NASDAQ:AAPL) iPhone 6. «Seeking Alpha, Abr 15»
Beneath the Surface 3: Intel's 14nm Atom Cherry Trail chip
Like the Snapdragon 810, the Apple A8 (iPhone 6 and iPhone 6 Plus) and A8X (iPad Air 2) are made by TSMC on its 20nm planar process. «ZDNet, Abr 15»
Intel / Micron Announce 3D NAND Production with Industry's Highest …
... write speeds, and long term data retention in the TLC memory cells as the planar cell size was reduced in the newer planar process nodes. «PC Perspectives, Mar 15»
48-layer V-NAND from Toshiba
... a 128TLC device on a 32-layer stack, which is the same density as it's getting on its best part on a planar process (19nm) at no better cost. «ElectronicsWeekly.com, Mar 15»